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LAN9215I_07 参数 Datasheet PDF下载

LAN9215I_07图片预览
型号: LAN9215I_07
PDF下载: 下载PDF文件 查看货源
内容描述: 高效的单芯片10/100以太网控制器与HP Auto-MDIX的和工业温度支持 [Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 138 页 / 1665 K
品牌: SMSC [ SMSC CORPORATION ]
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Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support  
Datasheet  
4.3.4  
Descrambling  
The descrambler performs an inverse function to the scrambler in the transmitter and also performs  
the Serial In Parallel Out (SIPO) conversion of the data.  
During reception of IDLE (/I/) symbols. the descrambler synchronizes its descrambler key to the  
incoming stream. Once synchronization is achieved, the descrambler locks on this key and is able to  
descramble incoming data.  
Special logic in the descrambler ensures synchronization with the remote PHY by searching for IDLE  
symbols within a window of 4000 bytes (40us). This window ensures that a maximum packet size of  
1514 bytes, allowed by the IEEE 802.3 standard, can be received with no interference. If no IDLE-  
symbols are detected within this time-period, receive operation is aborted and the descrambler re-starts  
the synchronization process.  
The descrambler can be bypassed by setting bit 0 of register 31.  
4.3.5  
4.3.6  
Alignment  
The de-scrambled signal is then aligned into 5-bit code-groups by recognizing the /J/K/ Start-of-Stream  
Delimiter (SSD) pair at the start of a packet. Once the code-word alignment is determined, it is stored  
and utilized until the next start of frame.  
5B/4B Decoding  
The 5-bit code-groups are translated into 4-bit data nibbles according to the 4B/5B table. The SSD,  
/J/K/, is translated to “0101 0101” as the first 2 nibbles of the MAC preamble. Reception of the SSD  
causes the PHY to assert the internal RX_DV signal, indicating that valid data is available on the  
Internal RXD bus. Successive valid code-groups are translated to data nibbles. Reception of either the  
End of Stream Delimiter (ESD) consisting of the /T/R/ symbols, or at least two /I/ symbols causes the  
PHY to de-assert the internal carrier sense and RX_DV.  
These symbols are not translated into data.  
4.4  
10Base-T Transmit  
Data to be transmitted comes from the MAC layer controller. The 10Base-T transmitter receives 4-bit  
nibbles from the MII at a rate of 2.5MHz and converts them to a 10Mbps serial data stream. The data  
stream is then Manchester-encoded and sent to the analog transmitter, which drives a signal onto the  
twisted pair via the external magnetics.  
The 10M transmitter uses the following blocks:  
„
„
„
„
MII (digital)  
TX 10M (digital)  
10M Transmitter (analog)  
10M PLL (analog)  
4.4.1  
4.4.2  
10M Transmit Data across the internal MII bus  
The MAC controller drives the transmit data onto the internal TXD BUS. When the controller has driven  
TX_EN high to indicate valid data, the data is latched by the MII block on the rising edge of TX_CLK.  
The data is in the form of 4-bit wide 2.5MHz data.  
Manchester Encoding  
The 4-bit wide data is sent to the TX10M block. The nibbles are converted to a 10Mbps serial NRZI  
data stream. The 10M PLL locks onto the external clock or internal oscillator and produces a 20MHz  
clock. This is used to Manchester encode the NRZ data stream. When no data is being transmitted  
SMSC LAN9215i  
65  
Revision 1.93 (12-12-07)  
DATASHEET