Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
Table 2.5 System and Power Signals (continued)
BUFFER
TYPE
NUM
PINS
NAME
SYMBOL
DESCRIPTION
GND for the PLL
PLL Ground
VSS_PLL
P
P
P
1
1
1
Reference Power
Reference Ground
VDD_REF
VSS_REF
Connected to 3.3v power and used as the
reference voltage for the internal PLL
Ground for internal PLL reference voltage
Note 2.1 Please refer to the SMSC application note AN14.9 - “Migrating from LAN9115 to the
LAN9215” for additional details.
Table 2.6 MII Interface Signals
BUFFER
TYPE
NUM
PINS
NAME
SYMBOL
DESCRIPTION
Transmit Clock:
TX_CLK
I
1
4
Transmit Clock: 25MHz in 100Base-TX mode.
2.5MHz in 10Base-T mode.
(PD)
Transmit Data [3:0]
Transmit Enable
TXD[3:0]
TX_EN
O8
(PD)
Transmit Data 3-0: Data bits that are accepted
by the PHY for transmission.
When the internal PHY is selected, these
signals are driven low (0).
O8
(PD)
1
Transmit Enable: Indicates that valid data is
presented on the TXD[3:0] signals, for
transmission.
When the internal PHY is selected, this signal
is driven low (0).
Receive Clock
Receive Error
RX_CLK
RX_ER
I
1
1
Receive Clock: 25MHz in 100Base-TX mode.
2.5MHz in 10Base-T mode.
(PD)
I
Receive Error: Asserted by the PHY to indicate
that an error was detected somewhere in the
frame presently being transferred from the PHY.
(PD)
Collision Detect:
Receive Data[3:0]
Carrier Sense
COL
RXD[3:0]
CRS
I
1
1
1
1
MII Collision Detect: Asserted by the PHY to
indicate detection of collision condition.
(PD)
I
Receive Data 3-0: Data bits that are sent from
the PHY to the Ethernet MAC. See Note 2.2.
Note 2.2
I
Carrier Sense: Indicates detection of carrier.
(PD)
Receive Data
Valid:
RX_DV
I
Receive Data Valid: Indicates that recovered
and decoded data nibbles are being presented
by the PHY on RXD[3:0].
(PD)
Revision 1.93 (12-12-07)
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SMSC LAN9215i
DATASHEET
SMSC [ SMSC CORPORATION ]
