High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.24 Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x)
Register #:
Port0: 0441h
Port1: 0841h
Port2: 0C41h
Size:
32 bits
This read/write register configures the flow control settings of the port.
BITS
DESCRIPTION
TYPE
DEFAULT
31:18
17:16
RESERVED
RO
-
Backoff Reset RX/TX
Half duplex-only. Determines when the truncated binary exponential backoff
attempts counter is reset.
R/W
00b
00 = Reset on successful transmission (IEEE standard)
01 = Reset on successful reception
1X = Reset on either successful transmission or reception
15:0
Pause Time Value
The value that is inserted into the transmitted pause packet when the switch
wants to “XOFF” its link partner.
R/W
FFFFh
Revision 1.2 (04-08-08)
346
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
