High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.9
Port x MAC Receive 1024 to Max Byte Count Register (MAC_RX_1024_TO_MAX_CNT_x)
Register #:
Port0: 0416h
Port1: 0816h
Port2: 0C16h
Size:
32 bits
This register provides a counter of received packets between the size of 1024 to the maximum
allowable number bytes. The counter is cleared upon being read.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
RX 1024 to Max Bytes
RC
00000000h
Count of packets (including bad packets) that have between 1024 and the
maximum allowable number of bytes. The max number of bytes is 1518 for
untagged packets and 1522 for tagged packets. If Jumbo2K (bit 3) is set in
the Port x MAC Receive Configuration Register (MAC_RX_CFG_x), the max
number of bytes is 2048.
Note:
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 5979 hours.
Note: A bad packet is defined as a packet that has an FCS or Symbol error. For this counter, a packet
with the maximum number of bytes that is not an integral number of bytes (e.g. a 1518 1/2
byte packet) is counted.
SMSC LAN9312
331
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
