High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.2.5.8
Port x 1588 Source UUID Low-DWORD Transmit Capture Register
(1588_SRC_UUID_LO_TX_CAPTURE_x)
Offset:
Port 1: 11Ch
Port 2: 13Ch
Port 0: 15Ch
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Source UUID Low (SRC_UUID_TX_LO)
This field contains the low 32-bits of the Source UUID from the 1588 Sync
or Delay_Req packet.
RO
00000000h
Note: The selection between Sync or Delay_Req packets is based on the corresponding
master/slave bit in the 1588 Configuration Register (1588_CONFIG).
Note: There are multiple instantiations of this register, one for each port of the LAN9312. Refer to
Section 14.2.5 for additional information.
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
the switch fabric.
Revision 1.2 (04-08-08)
208
SMSC LAN9312
DATASHEET