10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Table 0.1 LAN91C111 Datasheet Revision History (continued)
REVISION
LEVEL AND
DATE
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
Rev. 1.0
(07-01-02)
NAME
SECTION/FIGURE/ENTRY
CORRECTION
Add Description for FDUPLX bit.
Add Description for SPEED, DPLX, ANEG
bits.
Add Description for Interrupt Status and
Mask bits.
Modified Interrupt Structure Figure.
Changed bit name 0 to Reserved.
Reserved bits default at 00A0.
Modified Typical Flow of Event for TX.
Modified Typical Flow of Event for TX.
SMSC LAN91C111-REV B
DATASHEET
4
Revision 1.8 (07-13-05)
SMSC [ SMSC CORPORATION ]
