FIGURE 17 - BURST READ CYCLES - nVLBUS = 1
LCLK
nDATACS
W/nR
t12
t17
t19
t13
READ DATA
a
b
c
t15
t14
nRDYRTN
nCYCLE
t17
PARAMETER
MIN
60
30
15
2
TYP
MAX
UNITS
ns
t12
t13
t14
t15
t17
t19
nDATACS Setup to Either nCYCLE or W/nR Falling
nDATACS Hold after Either nCYCLE or W/nR Rising
nRDYRTN Setup to LCLK Falling
ns
ns
nRDYRTN Hold after LCLK Falling
ns
nCYCLE High and W/nR High Overlap
Data Delay from LCLK Rising (Read)
50
5
ns
38
ns
76