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LAN9118_07 参数 Datasheet PDF下载

LAN9118_07图片预览
型号: LAN9118_07
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能单芯片10/100非PCI以太网控制器 [High Performance Single-Chip 10/100 Non-PCI Ethernet Controller]
分类和应用: 控制器PC以太网局域网(LAN)标准
文件页数/大小: 129 页 / 1455 K
品牌: SMSC [ SMSC CORPORATION ]
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High Performance Single-Chip 10/100 Non-PCI Ethernet Controller  
Datasheet  
Table 5.6 LAN9118 MAC CSR Register Map  
MAC CONTROL AND STATUS REGISTERS  
SYMBOL REGISTER NAME  
MAC Control Register  
INDEX  
DEFAULT  
00040000h  
0000FFFFh  
FFFFFFFFh  
00000000h  
00000000h  
00000000h  
00000000h  
00000000h  
00000000h  
00000000h  
00000000h  
00000000h  
1
2
3
4
5
6
7
8
9
A
B
C
MAC_CR  
ADDRH  
ADDRL  
HASHH  
HASHL  
MII_ACC  
MII_DATA  
FLOW  
MAC Address High  
MAC Address Low  
Multicast Hash Table High  
Multicast Hash Table Low  
MII Access  
MII Data  
Flow Control  
VLAN1  
VLAN1 Tag  
VLAN2  
VLAN2 Tag  
WUFF  
Wake-up Frame Filter  
Wake-up Control and Status  
WUCSR  
5.4.1  
MAC_CR—MAC Control Register  
Offset:  
1
Attribute:  
Size:  
R/W  
Default Value:  
00040000h  
32 bits  
This register establishes the RX and TX operation modes and controls for address filtering and packet  
filtering.  
BITS  
DESCRIPTION  
31  
Receive All Mode (RXALL). When set, all incoming packets will be received and passed on to the  
address filtering Function for processing of the selected filtering mode on the received frame. Address  
filtering then occurs and is reported in Receive Status. When reset, only frames that pass Destination  
Address filtering will be sent to the Application.  
30-24  
23  
Reserved  
Disable Receive Own (RCVOWN). When set, the MAC disables the reception of frames when the  
MII TX_EN signal is asserted. The MAC blocks the transmitted frame on the receive path. When reset,  
the MAC receives all packets the PHY gives, including those transmitted by the MAC.This bit should  
be reset when the Full Duplex Mode bit is set.  
22  
Reserved  
Revision 1.3 (05-31-07)  
SMSC LAN9118  
DATA9S4HEET