High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
BITS
7
DESCRIPTION
TYPE
RW
DEFAULT
Collision Test. 1 = enable COL test, 0 = disable COL test
0
0
6-0
Reserved
RO
Note 5.1 This default value of this bit is determined by Pin 74 "SPEED_SEL". Please refer to the
pin description section for more details
5.5.2
Basic Status Register
Index (In Decimal):
1
Size:
16-bits
BITS
15
DESCRIPTION
100Base-T4. 1 = T4 able, 0 = no T4 ability
TYPE
RO
DEFAULT
0
1
14
100Base-TX Full Duplex. 1 = TX with full duplex, 0 = no TX full duplex
ability.
RO
13
12
11
100Base-TX Half Duplex. 1 = TX with half duplex, 0 = no TX half duplex
RO
RO
RO
1
1
1
ability.
10Base-T Full Duplex. 1 = 10Mbps with full duplex 0 = no 10Mbps with full
duplex ability
10Base-T Half Duplex. 1 = 10Mbps with half duplex 0 = no 10Mbps with
half duplex ability
10-6
5
Reserved
RO
RO
0
0
Auto-Negotiate Complete. 1 = auto-negotiate process completed 0 = auto-
negotiate process not completed
4
3
Remote Fault. 1 = remote fault condition detected 0 = no remote fault
RO/LH
RO
0
1
Auto-Negotiate Ability. 1 = able to perform auto-negotiation function 0 =
unable to perform auto-negotiation function
2
1
Link Status. 1 = link is up, 0 = link is down
RO/LL
RO/LH
0
0
Jabber Detect. 1 = jabber condition detected 0 = no jabber condition
detected
0
Extended Capabilities. 1 = supports extended capabilities registers 0 =
does not support extended capabilities registers.
RO
1
SMSC LAN9118
105
Revision 1.3 (05-31-07)
DATASHEET
SMSC [ SMSC CORPORATION ]
