High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
System Memory
System Memory
System
Peripherals
Magnetics
Ethernet
Microprocessor/
Microcontroller
System Bus
LAN9118
LEDS/GPIO
25MHz
XTAL
EEPROM
(Optional)
Figure 1.1 System Block Diagram Utilizing the SMSC LAN9118
The SMSC LAN9118 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the
function of translating parallel data from a host controller into Ethernet packets. The LAN9118 Ethernet
MAC/PHY controller is designed and optimized to function in an embedded environment. All
communication is performed with programmed I/O transactions using the simple SRAM-like host
interface bus.
The diagram shown above, describes a typical system configuration of the LAN9118 in a typical
embedded environment.
The LAN9118 is a general purpose, platform independent, Ethernet controller. The LAN9118 consists
of four major functional blocks. The four blocks are:
10/100 Ethernet PHY
10/100 Ethernet MAC
RX/TX FIFOs
Host Bus Interface (HBI)
Revision 1.3 (05-31-07)
SMSC LAN9118
DATA1S0HEET
SMSC [ SMSC CORPORATION ]
