Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Pin Description
GPIO2/nLED3**
GPIO1/nLED2**
GPIO0/nLED1**
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
FIFO_SEL
EXRES1
nRESET
GND_IO
VDD_IO
VDD_A
VDD_A
VDD_A
VSS_A
VSS_A
VSS_A
VSS_A
TPO+
TPO-
NC*1
NC*2
nWR
TPI+
nRD
nCS
TPI-
NC
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
RX_CLK
TX_CLK
TXD3
TXD2
TXD1
TXD0
D15
D14
D13
D12
D11
VDD_IO
VDD_IO
VDD_IO
GND_IO
GND_IO
GND_IO
**Denotes a m ultifunction pin
*1 This NC pin can also be tied to VDD_A for backw ard com patibility
*2 This NC pin can also be tied to VSS_A for backw ard com patibility
Figure 3 Pin Configuration
Revision 0.1 (12-20-04)
PRODUCT PREVIEW
6
GND_IO
VDD_IO
MDC
RX_DV
MDIO**
COL
CRS
D10
50
GND_CORE
VREG
VDD_CORE
VSS_PLL
XTAL2
XTAL1
VDD_PLL
VDD_REF
ATEST
RBIAS
VSS_REF
A7
A6
A5
A4
A3
A2
A1
GND_IO
VDD_IO
TX_EN
RXD1
RXD2
RXD3
RX_ER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SMSC
LAN9115
100 PIN TQFP
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
RXD0
SPEED_SEL
NC
IRQ
NC
PM E
EECLK**
EECS
EEDIO**
GND_CORE
VDD_CORE
D0
D1
D2
VDD_IO
GND_IO
D3
D4
D5
D6
VDD_IO
GND_IO
D7
D8
D9
SMSC LAN9115