®
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint
Datasheet
The following registers are supported (register numbers are in decimal):
Table 5.20 SMI Register Mapping
Group
REGISTER #
DESCRIPTION
Basic Control Register
0
Basic
1
Basic Status Register
Basic
2
PHY Identifier 1
Extended
3
PHY Identifier 2
Extended
4
Auto-Negotiation Advertisement Register
Auto-Negotiation Link Partner Ability Register
Auto-Negotiation Expansion Register
Silicon Revision Register
Mode Control/Status Register
Special Modes
Extended
5
Extended
6
Extended
16
17
18
20
21
22
23
26
27
28
29
30
31
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Vendor-specific
Reserved
Reserved
Reserved
Reserved
Symbol Error Counter Register
Control / Status Indication Register
Special internal testability controls
Interrupt Source Register
Interrupt Mask Register
PHY Special Control/Status Register
5.1
SMI Register Format
The mode key is as follows:
RW = Read/write,
SC = Self clearing,
WO = Write only,
RO = Read only,
LH = Latch high, clear on read of register,
LL = Latch low, clear on read of register,
NASR = Not Affected by Software Reset
X = Either a 1 or 0.
SMSC LAN8710/LAN8710i
Revision 1.0 (04-15-09)
DATA3S9HEET
SMSC [ SMSC CORPORATION ]
