®
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint
Datasheet
MODE0
MODE1
MODE2
HP Auto-MDIX
Auto-
Negotiation
10M Tx
Logic
10M
Transmitter
MODE Control
TXP / TXN
RXP / RXN
Reset
Control
Transmit Section
nRST
100M Tx
Logic
100M
Transmitter
Management
Control
SMI
RMIISEL
MDIX
Control
TXD[0:3]
TXEN
TXER
TXCLK
XTAL1/CLKIN
XTAL2
PLL
100M Rx
Logic
DSP System:
Analog-to-
Digital
Clock
Data Recovery
Equalizer
Interrupt
Generator
nINT
RXD[0:3]
RXDV
RXER
RXCLK
100M PLL
Receive Section
LED1
LED2
LED Circuitry
10M Rx
Logic
Squelch &
Filters
CRS
COL/CRS_DV
Central
Bias
RBIAS
10M PLL
MDC
MDIO
PHY
Address
Latches
PHYAD[0:2]
Figure 1.2 LAN8710/LAN8710i Architectural Overview
SMSC LAN8710/LAN8710i
Revision 1.0 (04-15-09)
DATAS11HEET