®
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint
Datasheet
6.4
RMII CLKIN Requirements
Table 6.10 RMII CLKIN (REF_CLK) Timing Values
PARAMETER
DESCRIPTION
CLKIN frequency
MIN
TYP
MAX
UNITS
MHz
ppm
%
NOTES
50
CLKIN Frequency Drift
CLKIN Duty Cycle
CLKIN Jitter
± 50
60
40
150
psec
p-p – not RMS
6.5
Reset Timing
T11.1
nRST
T11.2
T11.3
Configuration
Signals
T11.4
Output drive
Figure 6.10 Reset Timing Diagram
Table 6.11 Reset Timing Values
PARAMETER
DESCRIPTION
Reset Pulse Width
MIN
TYP
MAX
UNITS
NOTES
T11.1
T11.2
100
200
us
ns
Configuration input setup to
nRST rising
T11.3
T11.4
Configuration input hold after
nRST rising
10
20
ns
ns
Output Drive after nRST rising
800
20 clock cycles for
25 MHz clock
or
40 clock cycles for
50MHz clock
Revision 1.0 (04-15-09)
SMSC LAN8710/LAN8710i
DATA6S4HEET