Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
3.7.4.1
REF_CLK In Mode
In REF_CLK In Mode, the 50MHz REF_CLK is driven on the XTAL1/CLKIN pin. A 50MHz source for
REF_CLK must be available external to the device when using this mode. The clock is driven to both
the MAC and PHY as shown in Figure 3.7.
LAN8720A/LAN8720Ai
10/100 PHY
24-QFN
RMII
MAC
RMII
MDIO
MDC
nINT
Accepts external
50MHz clock
Mag
RJ45
TXD[1:0]
TXP
TXN
2
2
TXEN
RXP
RXN
RXD[1:0]
CRS_DV
RXER
REF_CLK
All RMII signals are
synchronous to the supplied
clock
XTAL1/CLKIN
XTAL2
LED[2:1]
nRST
2
Interface
50MHz
Reference
Clock
Figure 3.7 External 50MHz clock sources the REF_CLK
REF_CLK Out Mode
3.7.4.2
To reduce BOM cost, the device includes a feature to generate the RMII REF_CLK signal from a low-
cost, 25MHz fundamental crystal. This type of crystal is inexpensive in comparison to 3rd overtone
crystals that would normally be required for 50MHz. The MAC must be capable of operating with an
external clock to take advantage of this feature as shown in Figure 3.8.
In order to optimize package size and cost, the REFCLKO pin is multiplexed with the nINT pin. In
REF_CLK Out mode, the nINT functionality is disabled to accommodate usage of REFCLKO as a
50MHz clock to the MAC.
Note: The REF_CLK Out Mode is not part of the RMII Specification. Timing in this mode is not
compliant with the RMII specification. To ensure proper system operation, a timing analysis of
the MAC and LAN8720 must be performed.
Revision 1.4 (08-23-12)
34
SMSC LAN8720A/LAN8720Ai
DATASHEET
SMSC [ SMSC CORPORATION ]
