Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology
Datasheet
5.5.4
MII Interface Timing
This section specifies the MII interface transmit and receive timing. Please refer to Section 3.4.1, "MII,"
on page 30 for additional details.
tclkp
tclkh tclkl
RXCLK
tval
tval
thold
RXD[3:0]
RXDV
thold
tval
Figure 5.4 MII Receive Timing
Table 5.8 MII Receive Timing Values
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
NOTES
tclkp
tclkh
tclkl
tval
RXCLK period
RXCLK high time
Note 5.15
tclkp*0.4
tclkp*0.4
ns
ns
ns
ns
tclkp*0.6
tclkp*0.6
28.0
RXCLK low time
RXD[3:0], RXDV output valid from rising edge of
RXCLK
Note 5.16
Note 5.16
thold
RXD[3:0], RXDV output hold from rising edge of
RXCLK
10.0
ns
Note 5.15 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation.
Note 5.16 Timing was designed for system load between 10 pf and 25 pf.
SMSC LAN8710A/LAN8710Ai
73
Revision 1.4 (08-23-12)
DATASHEET