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Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology
Datasheet
Chapter 3 Functional Description
This chapter provides functional descriptions of the various device features. These features have been
categorized into the following sections:
Transceiver
Auto-negotiation
HP Auto-MDIX Support
MAC Interface
Serial Management Interface (SMI)
Interrupt Management
Configuration Straps
Miscellaneous Functions
Application Diagrams
3.1
Transceiver
3.1.1
100BASE-TX Transmit
The 100BASE-TX transmit data path is shown in Figure 3.1. Each major block is explained in the
following subsections.
TX_CLK
(for MII only)
PLL
MAC
Ext Ref_CLK (for RMII only)
MII 25 Mhz by 4 bits
4B/5B
Encoder
Scrambler
and PISO
25MHz
by 4 bits
25MHz by
5 bits
or
MII/RMII
RMII 50Mhz by 2 bits
NRZI
Converter
MLT-3
Converter
Tx
Driver
125 Mbps Serial
NRZI
MLT-3
MLT-3
MLT-3
MLT-3
Magnetics
RJ45
CAT-5
Figure 3.1 100BASE-TX Transmit Data Path
3.1.1.1
100BASE-TX Transmit Data Across the MII/RMII Interface
For MII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate
valid data. The data is latched by the transceiver’s MII block on the rising edge of TXCLK. The data
is in the form of 4-bit wide 25MHz data.
SMSC LAN8710A/LAN8710Ai
19
Revision 1.4 (08-23-12)
DATASHEET