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LAN8187-JT 参数 Datasheet PDF下载

LAN8187-JT图片预览
型号: LAN8187-JT
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能MII和RMII 10/100以太网PHY与HP Auto-MDIX的 [High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输局域网以太网局域网(LAN)标准时钟
文件页数/大小: 66 页 / 1007 K
品牌: SMSC [ SMSC CORPORATION ]
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High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
Chapter 1 General Description
The SMSC LAN8187/LAN8187I is a low-power, industrial temperature (LAN8187I), variable I/O
voltage, analog interface IC with HP Auto-MDIX for high-performance embedded Ethernet applications.
The LAN8187/LAN8187I can be configured to operate on a single 3.3V supply utilizing an integrated
3.3V to 1.8V linear regulator. An option is available to disable the linear regulator to optimize system
designs that have a 1.8V power plane available.
1.1
Architectural Overview
The LAN8187/LAN8187I consists of an encoder/decoder, scrambler/descrambler, wave-shaping
transmitter, output driver, twisted-pair receiver with adaptive equalizer and baseline wander (BLW)
correction, and clock and data recovery functions. The LAN8187/LAN8187I can be configured to
support either the Media Independent Interface (MII) or the Reduced Media Independent Interface
(RMII).
The LAN8187/LAN8187I is compliant with IEEE 802.3-2005 standards (MII Pins tolerant to 3.6V) and
supports both IEEE 802.3-2005 -compliant and vendor-specific register functions. It contains a full-
duplex 10-BASE-T/100BASE-TX transceiver and supports 10-Mbps (10BASE-T) operation on
Category 3 and Category 5 unshielded twisted-pair cable, and 100-Mbps (100BASE-TX) operation on
Category 5 unshielded twisted-pair cable.
10/100
Media
Access
Controller
(MAC)
or SOC
System Bus
MII /RMII
SMSC
LAN8187/
LAN8187I
Magnetics
Ethernet
LEDS/GPIO
25 MHz (MII) or 50MHz (RMIII)
Crystal or External Clock
Figure 1.1 LAN8187/LAN8187I System Block Diagram
Hubs and switches with multiple integrated MACs and external PHYs can have a large pin count due
to the high number of pins needed for each MII interface. An increasing pin count causes increasing
cost.
The RMII interface is intended for use on Switch based ASICs or other embedded solutions requiring
minimal pincount for ethernet connectivity. RMII requires only 6 pins for each MAC to PHY interface
plus one common reference clock. The MII requires 16 pins for each MAC to PHY interface.
The SMSC LAN8187/LAN8187I is capable of running in RMII mode. Please refer to the RMII
consortium for more information on the RMII standard
http://www.rmii-consort.com.
The LAN8187/LAN8187I referenced throughout this document applies to both the commercial
temperature and industrial temperature components. The LAN8187I refers to only the industrial
temperature component.
Revision 0.6 (02-24-06)
DATASHEET
8
SMSC LAN8187/LAN8187I