USB2.0 PHY IC
Table 4.3 USB I/O Signals
ACTIVE
NAME
NAME
DIRECTION
LEVEL
DESCRIPTION
DP
DM
I/O
I/O
N/A
N/A
USB Positive Data Pin.
USB Negative Data Pin.
Table 4.4 Biasing and Clock Oscillator Signals
ACTIVE
DIRECTION
LEVEL
DESCRIPTION
RBIAS
Input
N/A
External 1% bias resistor. Requires a 12KΩ resistor to ground.
Used for setting HS transmit current level and on-chip termination
impedance.
XI/XO
Input
N/A
External crystal. 12MHz crystal connected from XI to XO.
Table 4.5 Power and Ground Signals
ACTIVE
NAME
DIRECTION
LEVEL
DESCRIPTION
VDD3.3
VDD1.8
VSS
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
3.3V Digital Supply. Powers digital pads. See Note 4.1
1.8V Digital Supply. Powers digital core.
Digital Ground. See Note 4.2
VDDA3.3
3.3V Analog Supply. Powers analog I/O and 3.3V analog
circuitry.
VDDA1.8
VSSA
N/A
N/A
N/A
N/A
1.8V Analog Supply. Powers 1.8V analog circuitry. See Note 4.1
Analog Ground. See Note 4.2
Note 4.1 A Ferrite Bead (with DC resistance <.5 Ohms) is recommended for filtering between both
the VDD3.3 and VDDA3.3 supplies and the VDD1.8 and VDDA1.8 Supplies. See
Figure 8.9 Application Diagram for 64-pin TQFP Package on page 40.
Note 4.2 56-pin QFN package will down-bond all VSS and VSSA to exposed pad under IC.
Exposed pad must be connected to solid GND plane on printed circuit board.
Revision 1.3 (10-05-04)
7
SMSC GT3200, SMSC USB3250
DATASHEET
SMSC [ SMSC CORPORATION ]
