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FDC37CXFR 参数 Datasheet PDF下载

FDC37CXFR图片预览
型号: FDC37CXFR
PDF下载: 下载PDF文件 查看货源
内容描述: 即插即用兼容超I / O控制器,提供快速IR [Plug and Play Compatible Ultra I/O Controller with Fast IR]
分类和应用: 控制器
文件页数/大小: 258 页 / 898 K
品牌: SMSC [ SMSC CORPORATION ]
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AUTO POWER MANAGEMENT  
Power management capabilities are provided for  
DSR From Powerdown  
the following logical devices: floppy disk, UART  
1, UART 2 and the parallel port. For each  
logical device, two types of power management  
are provided; direct powerdown and auto  
powerdown.  
If DSR powerdown is used when the part is in  
auto powerdown, the DSR powerdown will  
override the auto powerdown. However, when  
the part is awakened from DSR powerdown, the  
auto powerdown will once again become  
effective.  
FDC Power Management  
Direct power management is controlled by  
CR22. Refer to CR22 for more information.  
Wake Up From Auto Powerdown  
If the part enters the powerdown state through  
the auto powerdown mode, then the part can be  
awakened by reset or by appropriate access to  
certain registers.  
Auto power management is enabled by CR23-  
B0. When set, this bit allows FDC to enter  
powerdown when all of the following conditions  
have been met:  
If a hardware or software reset is used then the  
part will go through the normal reset sequence.  
If the access is through the selected registers,  
then the FDC resumes operation as though it  
was never in powerdown. Besides activating the  
RESET pin or one of the software reset bits in  
the DOR or DSR, the following register  
accesses will wake up the part:  
1. The motor enable pins of register 3F2H are  
inactive (zero).  
2. The part must be idle; MSR=80H and INT =  
0 (INT may be high even if MSR = 80H due  
to polling interrupts).  
3. The head unload timer must have expired.  
4. The Auto powerdown timer (10msec) must  
have timed out.  
1. Enabling any one of the motor enable bits  
in the DOR register (reading the DOR does  
not awaken the part).  
2. A read from the MSR register.  
3. A read or write to the Data register.  
An internal timer is initiated as soon as the auto  
powerdown command is enabled. The part is  
then powered down when all the conditions are  
met.  
Disabling the auto powerdown mode cancels the  
timer and holds the FDC block out of auto  
powerdown.  
Once awake, the FDC will reinitiate the auto  
powerdown timer for 10 ms. The part will  
powerdown again when all the powerdown  
conditions are satisfied.  
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