t2
PDATA<7:0>
t1
t5
t6
nACK
t4
t3
t4
nAUTOFD
Parameter
min
max
units
Notes
t1
t2
PDATA Valid to nACK Asserted
nAUTOFD Deasserted to PDATA
Changed
0
0
ns
ns
t3
t4
nACK Asserted to nAUTOFD
Deasserted
nACK Deasserted to nAUTOFD
Asserted
80
80
200
200
ns
ns
1,2
2
t5
t6
nAUTOFD Asserted to nACK Asserted
nAUTOFD Deasserted to nACK
Deasserted
0
0
ns
ns
NOTES:
1. Maximum value only applies if there is room in the FIFO and a terminal count has not
been received. ECP can stall by keeping nAUTOFD low.
2. nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to
130 ns.
FIGURE 22 - ECP PARALLEL PORT REVERSE TIMING
SMSC DS – FDC37N769
Page 135 of 137
Rev. 02-16-07
DATASHEET