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FDC37M607 参数 Datasheet PDF下载

FDC37M607图片预览
型号: FDC37M607
PDF下载: 下载PDF文件 查看货源
内容描述: 增强的超级I / O控制器,红外支持 [ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT]
分类和应用: 控制器
文件页数/大小: 182 页 / 634 K
品牌: SMSC [ SMSC CORPORATION ]
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SERIAL PORT (UART)  
The FDC37M60x incorporates two full function  
UARTs. They are compatible with the  
NS16450, the 16450 ACE registers and the  
NS16550A. The UARTS perform serial-to-  
parallel conversion on received characters and  
parallel-to-serial conversion on transmit  
by programming UT2 of that UART to a logic  
"1". OUT2 being a logic "0" disables that  
UART's interrupt. The second UART also  
supports IrDA, HP-SIR, and ASK-IR infrared  
modes of operation.  
characters. The data rates are independently  
programmable from 460.8K baud down to 50  
baud. The character options are programmable  
for 1 start; 1, 1.5 or 2 stop bits; even, odd, sticky  
or no parity; and prioritized interrupts. The  
UARTs each contain a programmable baud rate  
generator that is capable of dividing the input  
clock or crystal by a number from 1 to 65535.  
The UARTs are also capable of supporting the  
MIDI data rate. Refer to the Configuration  
Registers for information on disabling, power  
down and changing the base address of the  
UARTs. The interrupt from a UART is enabled  
Note: The UARTs may be configured to share  
an interrupt. Refer to the Configuration section  
for more information.  
REGISTER DESCRIPTION  
Addressing of the accessible registers of the  
Serial Port is shown below.  
The base  
addresses of the serial ports are defined by the  
configuration registers (see Configuration  
section). The Serial Port registers are located at  
sequentially increasing addresses above these  
base addresses. The FDC37M60x contains two  
serial ports, each of which contain a register set  
as described below.  
Table 31 - Addressing the Serial Port  
DLAB*  
A2  
0
0
0
0
0
0
1
1
1
1
0
0
A1  
0
0
0
1
1
1
0
0
1
1
0
0
A0  
0
0
1
0
0
1
0
1
0
1
0
1
REGISTER NAME  
Receive Buffer (Read)  
0
0
Transmit Buffer (Write)  
0
Interrupt Enable (Read/Write)  
Interrupt Identification (Read)  
FIFO Control (Write)  
X
X
X
X
X
X
X
1
Line Control (Read/Write)  
Modem Control (Read/Write)  
Line Status (Read/Write)  
Modem Status (Read/Write)  
Scratchpad (Read/Write)  
Divisor LSB (Read/Write)  
Divisor MSB (Read/Write)  
1
*Note: DLAB is Bit 7 of the Line Control Register  
66  
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