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FDC37C67X 参数 Datasheet PDF下载

FDC37C67X图片预览
型号: FDC37C67X
PDF下载: 下载PDF文件 查看货源
内容描述: 增强的超级I / O控制器,提供快速IR [ENHANCED SUPER I/O CONTROLLER WITH FAST IR]
分类和应用: 多功能外围设备微控制器和处理器PC时钟
文件页数/大小: 194 页 / 536 K
品牌: SMSC [ SMSC CORPORATION ]
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DESCRIPTION OF PIN FUNCTIONS
PIN
No./QFP
64
Note 0:
Gate A20
NAME
TOTAL
1
SYMBOL
A20M
BUFFER
TYPE
O4
Note 1:
Note 2:
Note 3:
The interrupt request is output on one of the IRQx signals as an 024 buffer type. If EPP or
ECP Mode is enabled, this output is pulsed low, then released to allow sharing of interrupts.
In this case, the buffer type is OD24. Refer to the configuration section for more
information.
For 12-bit addressing, SA0:SA11 only, nCS should be tied to GND. For 16-bit external
address qualification, address bits SA11:SA15 can be "ORed" together and applied to nCS.
The nCS pin functions as SA11 in full 16-bit Internal Address Qualification Mode. CR24.6
controls the FDC37C67x addressing modes.
The "n" as the first letter of a signal name indicates an "Active Low" signal.
KBDRST is active low.
Buffer Type Descriptions
I
IS
IOD16P
IO24
IO4
O4
O24
OD24
ICLK
Input, TTL compatible.
Input with Schmitt trigger.
Input/Output, 16mA sink, 90uA pull-up.
Input/Output, 24mA sink, 12mA source.
Input/Output, 4mA sink, 2mA source.
Output, 4mA sink, 2mA source.
Output, 24mA sink, 12mA source.
Output, Open Drain, 24mA sink.
Clock Input
9