Model 30 Mode
7
6
0
5
0
4
0
3
2
1
0
DSK
CHG
DMAEN NOPREC DRATE DRATE
SEL1
SEL0
RESET
COND.
N/A
0
0
0
0
0
1
0
BITS 0 - 1 DATA RATE SELECT
These bits control the data rate of the floppy
controller. See Table 13 for the settings
corresponding to the individual data rates. The
data rate select bits are unaffected by
BIT 3 DMAEN
This bit reflects the value of DMAEN bit set in
the DOR register bit 3.
a
BITS 4 - 6 UNDEFINED
software reset, and are set to 250kb/s after a
hardware reset.
Always read as a logic "0"
BIT 7 DSKCHG
This bit monitors the pin of the same name and
BIT 2 NOPREC
This bit reflects the value of NOPREC bit set in
reflects the opposite value seen on the pin.
the CCR register.
32
SMSC [ SMSC CORPORATION ]
