INTEGRATED DRIVE ELECTRONICS INTERFACE
The IDE interface enables hard disks with
ADDRESS (CR21) Base +[0:7]
embedded controllers (AT and XT) to be
interfaced to the host processor. The following
These AT registers contain the Task File
Registers. These registers communicate data,
command, and status information with the AT
host, and are addressed when nHDCS0 is low.
definitions are for reference only.
registers are not implemented in the
FDC37C669. Access to these registers is
controlled by the FDC37C669. For more
These
information, refer to the IDE pin descriptions
and the ATA specification.
ADDRESS (CR22) Base +6
This AT register may be used by the BIOS for
drive control. It is accessed by the AT interface
when nHDSC1 is active.
HOST FILE REGISTERS
The HOST FILE REGISTERS are accessed by
the AT Host, rather than the Local Processor.
There are two groups of registers, the AT Task
File, and the Miscellaneous AT Registers.
Figure 2 shows the AT Host Register Map of
the FDC37C669.
REGISTER ADDRESS
(CR21) IDE BASE I/O
ADDRESS +[0:7]
TASK FILE REGISTERS
MISC AT REGISTER
(CR22) BASE I/O
ADDRESS +6
FIGURE 2 - HOST PROCESSOR REGISTER ADDRESS MAP (AT MODE)
compatible. Please refer to the ATA and EATA
specifications. These are available from:
TASK FILE REGISTERS
Task File Registers may be accessed by the
host AT when pin nHDCS0 is active (low). The
Data Register (1F0H) is 16 bits wide; the
remaining task file registers are 8 bits wide. The
task file registers are ATA and EATA
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