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FDC37B78X_07 参数 Datasheet PDF下载

FDC37B78X_07图片预览
型号: FDC37B78X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 超级I / O控制器,支持ACPI ,实时时钟和消费性红外端口 [Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR]
分类和应用: 控制器时钟
文件页数/大小: 249 页 / 865 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号FDC37B78X_07的Datasheet PDF文件第16页浏览型号FDC37B78X_07的Datasheet PDF文件第17页浏览型号FDC37B78X_07的Datasheet PDF文件第18页浏览型号FDC37B78X_07的Datasheet PDF文件第19页浏览型号FDC37B78X_07的Datasheet PDF文件第21页浏览型号FDC37B78X_07的Datasheet PDF文件第22页浏览型号FDC37B78X_07的Datasheet PDF文件第23页浏览型号FDC37B78X_07的Datasheet PDF文件第24页  
PS/2 Model 30 Mode  
7
6
5
4
3
2
1
0
nDRV2 nDS1  
nDS0 WDATA RDATA WGATE nDS3  
nDS2  
F/F  
F/F  
F/F  
RESET  
COND.  
N/A  
1
1
0
0
0
1
1
edge of RDATA and is cleared by the read of the  
DIR register.  
BIT 4 WRITE DATA  
BIT 0 nDRIVE SELECT 2  
The DS2 disk interface is not supported. (Always  
1)  
Active high status of the latched WDATA output  
signal. This bit is latched by the inactive going  
edge of WDATA and is cleared by the read of the  
DIR register. This bit is not gated with WGATE.  
BIT 1 nDRIVE SELECT 3  
The DS3 disk interface is not supported. (Always  
1)  
BIT 5 nDRIVE SELECT 0  
BIT 2 WRITE GATE  
Active low status of the DS0 disk interface output.  
Active high status of the latched WGATE output  
signal. This bit is latched by the active going edge  
of WGATE and is cleared by the read of the DIR  
register.  
BIT 6 nDRIVE SELECT 1  
Active low status of the DS1 disk interface output.  
BIT 3 READ DATA  
BIT 7 nDRV2  
Active high status of the latched RDATA output  
signal. This bit is latched by the inactive going  
Active low status of the DRV2 disk interface input,  
this is not supported. (Always 1)  
20  
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