DESCRIPTION OF PIN FUNCTIONS
PIN
No./QFP
BUFFER
TYPE
NAME
TOTAL
SYMBOL
97
Data Set Ready 2/Sys Addr 15
1
nDSR2/
SA15
I/I
94
92
Data Carrier Detect 2/8042 P12
Ring Indicator 2/8042 P16
1
1
nDCD2/P12
nRI2/P16
I/IO24
I/IO24
PARALLEL PORT INTERFACE (17)
68:75
67
Parallel Port Data Bus
8
1
1
1
1
1
1
1
1
1
PD[0:7]
nSLCTIN
nINIT
IO24
Printer Select
OD24/O24
66
Initiate Output
Auto Line Feed
Strobe Signal
OD24/O24
82
nALF
OD24/O24
83
nSTROBE
BUSY
OD24/O24
79
Busy Signal
I
I
I
I
I
80
Acknowledge Handshake
Paper End
nACK
78
PE
77
Printer Selected
Error at Printer
SLCT
81
nERROR
KEYBOARD/MOUSE INTERFACE (6)
56
57
58
59
63
Keyboard Data
Keyboard Clock
Mouse Data
1
1
1
1
1
KDAT
KCLK
MDAT
MCLK
IOD16
IOD16
IOD16
IOD16
O4
Mouse Clock
Keyboard Reset
KBDRST
(Note 3)
64
Gate A20
1
A20M
O4
Note 1:
For 12 bit addressing, SA0:SA11 only, nCS should be tied to GND. For 16 bit external
address qualification, address bits SA11:SA15 can be "ORed" together and applied to nCS.
The nCS pin functions as SA11 in full 16 bit Internal Address Qualification Mode. CR24.6
controls the FDC37B77x addressing modes.
Note 2:
Note 3:
Note 4:
The "n" as the first letter of a signal name indicates an "Active Low" signal.
KBDRST is active low.
The pull-down on this pin is always active including when the output driver is tristated
and regardless of the state of internal PWRGOOD.
Note 5:
Note 6:
The “activate” bit for the CIrCC is reset by VTR POR only. The VCC power-up default for
this pin is Logic “0”.
The “activate” bit for Serial Port 2 is reset by VTR POR only. The VCC power-up default for
this pin is Logic “1”.
8