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FDC37B776 参数 Datasheet PDF下载

FDC37B776图片预览
型号: FDC37B776
PDF下载: 下载PDF文件 查看货源
内容描述: 增强的超级I / O控制器带唤醒特点 [ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES]
分类和应用: 控制器
文件页数/大小: 196 页 / 566 K
品牌: SMSC [ SMSC CORPORATION ]
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Table 17 - Description of Command Symbols  
NAME DESCRIPTION  
SYMBOL  
NCN  
New Cylinder  
Number  
The desired cylinder number.  
ND  
Non-DMA Mode  
Flag  
When set to 1, indicates that the FDC is to operate in the non-  
DMA mode. In this mode, the host is interrupted for each data  
transfer. When set to 0, the FDC operates in DMA mode,  
interfacing to a DMA controller by means of the DRQ and nDACK  
signals.  
OW  
Overwrite  
The bits D0-D3 of the Perpendicular Mode Command can only be  
modified if OW is set to 1. OW id defined in the Lock command.  
PCN  
Present Cylinder The current position of the head at the completion of Sense  
Number  
Interrupt Status command.  
POLL  
PRETRK  
Polling Disable  
When set, the internal polling routine is disabled. When clear,  
polling is enabled.  
Precompensation Programmable from track 00 to FFH.  
Start Track  
Number  
R
Sector Address  
The sector number to be read or written. In multi-sector transfers,  
this parameter specifies the sector number of the first sector to be  
read or written.  
RCN  
SC  
Relative Cylinder Relative cylinder offset from present cylinder as used by the  
Number  
Relative Seek command.  
Number of  
The number of sectors per track to be initialized by the Format  
Sectors Per Track command. The number of sectors per track to be verified during a  
Verify command when EC is set.  
SK  
Skip Flag  
When set to 1, sectors containing a deleted data address mark will  
automatically be skipped during the execution of Read Data. If  
Read Deleted is executed, only sectors with a deleted address  
mark will be accessed. When set to "0", the sector is read or  
written the same as the read and write commands.  
SRT  
Step Rate Interval The time interval between step pulses issued by the FDC.  
Programmable from 0.5 to 8 milliseconds in increments of 0.5 ms  
at the 1 Mbit data rate. Refer to the SPECIFY command for actual  
delays.  
ST0  
ST1  
ST2  
ST3  
Status 0  
Status 1  
Status 2  
Status 3  
Registers within the FDC which store status information after a  
command has been executed. This status information is available  
to the host during the result phase after command execution.  
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