specified as open-collector), the drivers are
dynamically changed from open-collector to
totem-pole. The timing for the dynamic driver
Output Drivers
To facilitate higher performance data transfer,
the use of balanced CMOS active drivers for
critical signals (Data, HostAck, HostClk,
PeriphAck, PeriphClk) are used ECP Mode.
Because the use of active drivers can present
change is specified in
then
IEEE 1284
Extended Capabilities Port Protocol and ISA
Interface Standard, Rev. 1.14, July 14, 1993,
available from Microsoft. The dynamic driver
change must be implemented properly to
prevent glitching the outputs.
compatibility
Mode (the control signals, by tradition, are
problems
in Compatible
t6
t3
PDATA
t1
t2
t5
nSTROBE
t4
BUSY
FIGURE 16 - PARALLEL PORT FIFO TIMING
NAME
t1
DESCRIPTION
DATA Valid to nSTROBE Active
MIN
600
600
450
TYP
MAX
UNITS
ns
t2
nSTROBE Active Pulse Width
ns
t3
DATA Hold from nSTROBE Inactive (Note 1)
nSTROBE Active to BUSY Active
BUSY Inactive to nSTROBE Active
BUSY Inactive to PDATA Invalid (Note 1)
ns
t4
500
ns
t5
680
80
ns
t6
ns
Note 1: The data is held until BUSY goes inactive or for time t3, whichever is longer. This only
applies if another data transfer is pending. If no other data transfer is pending, the data is
held indefinitely.
187
SMSC [ SMSC CORPORATION ]
