Model 30 Mode
7
6
0
5
0
4
0
3
2
1
0
DSK
CHG
N/A
DMAEN NOPREC DRATE DRATE
SEL1
1
SEL0
0
RESET
COND.
0
0
0
0
0
BITS 0 - 1 DATA RATE SELECT
These bits control the data rate of the floppy
controller. See Table 11 for the settings
BIT 3 DMAEN
This bit reflects the value of DMAEN bit set in the
DOR register bit 3.
corresponding to the individual data rates. The
data rate select bits are unaffected by a software
reset, and are set to 250 Kbps after a hardware
reset.
BITS 4 - 6 UNDEFINED
Always read as a logic "0"
BIT 7 DSKCHG
BIT 2 NOPREC
This bit reflects the value of NOPREC bit set in the
CCR register.
This bit monitors the pin of the same name and
reflects the opposite value seen on the disk cable
or the value programmed in the Force Disk
Change Register (see Configuration Register
LD8:CRC1[1:0]).
29
SMSC [ SMSC CORPORATION ]
