RPM-Based Fan Controller with Multiple Temperature Zones & Hardware Thermal Shutdown
Datasheet
If the RPM-based Fan Speed Control Algorithm is used, the TACH Target is updated after every
conversion. It is always set to the minimum TACH Target that is stored by the Look Up Table. The
PWM duty cycle is updated based on the RPM-based Fan Speed Control Algorithm configuration
settings.
If the RPM-based Fan Speed Control Algorithm is not used, then the output PWM duty cycle is updated
after every conversion. It is set to the maximum duty cycle that is stored by the Look Up Table.
If the measured temperature reading on all channels is less than the lowest threshold setting minus
the appropriate hysteresis setting, then the Fan driver will be set to 0% duty cycle and the fan will be
disabled.
7.36
Software Lock Register
Table 7.53 Software Lock
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Software
Lock
EFh
R/W
-
-
-
-
-
-
-
LOCK
00h
The Software Lock Register controls the software locking of critical registers. This register is software
locked.
Bit 0 - LOCK - this bit acts on all registers that are designated SWL. When this bit is set, the locked
registers become read only and cannot be updated.
‘0’ (default) - all SWL registers can be updated normally.
‘1’ - all SWL registers cannot be updated and a hard-reset is required to unlock them.
7.37
Product Features Register
Table 7.54 Product Features Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Product
Features
FCh
R
-
-
ADDR_SEL[2:0]
SHDN_SEL[2:0]
00h
The Product Features Register indicates which pin selected functionality is enabled.
Bits 5-3 - ADDR_SEL[2:0] - Indicates the address that is decoded by the ADDR_SEL pin as shown in
Table 7.55, "ADDR_SEL[2:0] Encoding".
Table 7.55 ADDR_SEL[2:0] Encoding
ADDR_SEL[2:0]
2
1
0
SMBUS ADDRESS
0
0
0
0
0
1
0
1
0
0101_100(r/w)
0101_101(r/w)
0101_110(r/w)
Revision 1.2 (10-08-09)
SMSC EMC2113
DATA7S0HEET
SMSC [ SMSC CORPORATION ]
