Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
Table 6.1 EMC2104 Register Set (continued)
REGISTER
NAME
DEFAULT
VALUE
ADDR
R/W
FUNCTION
LOCK
PAGE
Muxed Pin
Configuration
Register
Controls the pin function for the pins
muxed with PWMs or GPIOs
E0h
R/W
01h
00h
00h
No
Page 79
GPIO Direction
Register
Controls the GPIO direction for GPIOs 1
- 4
E1h
E2h
R/W
R/W
No
No
Page 80
Page 80
GPIO Output
Configuration
Register
Controls the output type GPIOs 1 - 4
GPIO Input
Register
E3h
E4h
E5h
E6h
R
Stores the inputs for GPIOs 1 - 4
Controls the output state of GPIOs 1 - 4
Enabled Interrupts for GPIOs 1 - 4
00h
00h
00h
00h
No
No
No
No
Page 80
Page 81
Page 81
Page 81
GPIO Output
Register
R/W
R/W
R
GPIO Interrupt
Enable Register
Indicates change of state for inputs on
GPIOs 1 - 4
GPIO Status
Software Lock
Product Features
Lock Register
EF
R/W
Locks all SWL registers
Revision Registers
00h
SWL
Page 82
Stores information about which pin
controlled product features are set
FCh
R
00h
No
Page 82
FDh
FEh
FFh
R
R
R
Product ID
Manufacturer ID
Revision
Stores the unique Product ID
Stores the Manufacturer ID
Revision
1Dh
5Dh
02h
No
No
No
Page 83
Page 83
Page 83
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to
undefined registers will not have an effect.
6.1.1
Lock Entries
The Lock Column describes the locking mechanism, if any, used for individual registers. All SWL
registers are Software Locked and therefore made read-only when the LOCK bit is set.
SMSC EMC2104
Revision 1.74 (05-08-08)
DATA4S9HEET
SMSC [ SMSC CORPORATION ]
