RPM-Based Fan Controller with HW Thermal Shutdown
Datasheet
Table 6.11 Beta Compensation Look Up Table
BETAX[2:0]
1
2
0
MINIMUM BETA
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
< 0.08
< 0.111
< 0.176
< 0.29
< 0.48
< 0.9
< 2.33
Disabled
6.8
REC Configuration Register
Table 6.12 REC Configuration Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
REC2
B0
DEFAULT
REC
Configuration
17h
R/W
-
-
-
-
-
REC3
REC1
07h
The REC Configuration Register determines whether Resistance Error Correction is used for each
external diode channel.
Bit 2 - REC3 (EMC2102-2 only)- Controls the Resistance Error Correction functionality of External
Diode 3 (if enabled)
‘0’ - the REC functionality for External Diode 3 is disabled
‘1’ (default) - the REC functionality for External Diode 3 is enabled.
Bit 1 - REC2 (EMC2103-2 only)- Controls the Resistance Error Correction functionality of External
Diode 2. If External Diode 2 is selected as the hardware shutdown channel then this bit is read only
and determined by the SHDN_SEL pin (see Section 5.1.1).
‘0’ - the REC functionality for External Diode 2 is disabled
‘1’ (default) - the REC functionality for External Diode 2 is enabled.
Bit 0 - REC1 - Indicates the Resistance Error Correction functionality of External Diode 1. If External
Diode 1 is selected as the hardware shutdown channel then this bit is read only and determined by
the SHDN_SEL pin (see Section 5.1.1).
‘0’ - the REC functionality for External Diode 1 is disabled
‘1’ (default) - the REC functionality for External Diode 1 is enabled.
The REC Configuration Register is software locked.
Revision 0.85 (01-29-08)
SMSC EMC2103
DATA4S6HEET