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EMC1422_08 参数 Datasheet PDF下载

EMC1422_08图片预览
型号: EMC1422_08
PDF下载: 下载PDF文件 查看货源
内容描述: 1°C温度传感器与硬件热关断 [1∑C Temperature Sensor with Hardware Thermal Shutdown]
分类和应用: 传感器温度传感器
文件页数/大小: 38 页 / 579 K
品牌: SMSC [ SMSC CORPORATION ]
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1°C Temperature Sensor with Hardware Thermal Shutdown  
Datasheet  
5.3.1  
ALERT Pin Interrupt Mode  
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit  
measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected.  
The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit  
condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are  
cleared.  
The ALERT pin can be masked by setting the MASK bit. Once the ALERT pin has been masked, it  
will be de-asserted and remain de-asserted until the MASK bit is cleared by the user. Any interrupt  
conditions that occur while the ALERT pin is masked will update the Status Register normally.  
The ALERT pin is used as an interrupt signal or as an Smbus Alert signal that allows an SMBus slave  
to communicate an error condition to the master. One or more ALERT outputs can be hard-wired  
together.  
5.3.2  
ALERT Pin Comparator Mode  
When the ALERT pin is configured to operate in comparator mode it will be asserted if any of the  
measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until  
all temperatures drop below the corresponding high limit minus the THERM Hysteresis value.  
When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be  
set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is  
deasserted, the status bits will be automatically cleared.  
The MASK bit will not block the ALERT pin in this mode, however the individual channel masks (see  
Section 6.12) will prevent the respective channel from asserting the ALERT pin.  
5.4  
ALERT and SYS_SHDN Pin Considerations  
Because of the decode method used to determine the Hardware Thermal Shutdown Limit, it is  
important that the pull-up resistance on both the ALERT and SYS_SHDN pins be within the tolerances  
shown in Table 5.2. Additionally, the pull-up resistor on the ALERT and SYS_SHDN pins must be  
connected to the same 3.3V supply that drives the VDD pin.  
For 15ms after power up, the ALERT and SYS_SHDN pins must not be pulled low or the Hardware  
Thermal Shutdown Limit will not be decoded properly. If the system requirements do not permit these  
conditions, then the ALERT and SYS_SHDN pins must be isolated from their respective busses during  
this time.  
One method of isolating this pin is shown in Figure 5.3.  
+3.3V  
+2.5 - 5V  
22K  
4.7K -  
33K  
VDD  
DP1  
1
2
3
10 SMCLK  
9
8
7
SMDATA  
ALERT  
GND  
Shared Alert/  
DN1  
SYS_SHDN  
4
Figure 5.3 Isolating ALERT and SYS_SHDN Pins  
Revision 1.24 (02-05-08)  
SMSC EMC1422  
DATA1S8HEET