1°C Temperature Sensor with Beta Compensation
Datasheet
4.6
Alert Response Address
The ALERT output can be used as a processor interrupt or as an SMBus Alert.
When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA)
to the general address of 0001_100xb. All devices with active interrupts will respond with their client
address as shown in Table 4.6.
Table 4.6 Alert Response Address Protocol
ALERT
RESPONSE
ADDRESS
DEVICE
ADDRESS
START
1 -> 0
RD
ACK
NACK
STOP
0001_100
1
0
1001_1000
1
0 -> 1
The EMC1403 and EMC1404 will respond to the ARA in the following way:
1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication
from the device was not prematurely stopped due to a bus contention event).
2. Set the MASK bit to clear the ALERT pin.
APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status
Register being cleared, the ALERT pin will be reasserted.
4.7
4.8
SMBus Address
The EMC1403 and EMC1404 respond to hard-wired SMBus slave address as shown in Table 1.1.
Note: Other addresses are available. Contact SMSC for more information.
SMBus Timeout
The EMC1403 and EMC1404 support SMBus Timeout. If the clock line is held low for longer than
30ms, the device will reset its SMBus protocol. This function can be enabled by setting the TIMEOUT
bit in the Consecutive Alert Register (see Section 6.12).
Revision 2.0 (08-10-12)
SMSC EMC1403/EMC1404
DATA1S6HEET
SMSC [ SMSC CORPORATION ]
