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EMC1403-2-YZT-TR 参数 Datasheet PDF下载

EMC1403-2-YZT-TR图片预览
型号: EMC1403-2-YZT-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Serial Switch/Digital Sensor, 11 Bit(s), 2Cel, Rectangular, Surface Mount, ROHS COMPLIANT, SOIC-14]
分类和应用: 输出元件传感器换能器
文件页数/大小: 54 页 / 497 K
品牌: SMSC [ SMSC CORPORATION ]
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1°C Temperature Sensor with Beta Compensation  
Datasheet  
Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear  
the LOW status bit in the Status Register.  
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and  
any of these status bits are set.  
The status bits will remain set until read unless the ALERT pin is configured as a comparator output  
(see Section 5.3.2).  
Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low  
limit.  
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low  
limit.  
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low  
limit.  
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.  
6.17  
THERM Limit Status Register  
Table 6.22 THERM Limit Status Register  
ADDR.  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
THERM  
Limit  
Status  
E3  
E2  
E1  
THERM  
37h  
R-C  
-
-
-
-
ITHERM  
00h  
THERM THERM  
The THERM Limit Status Register contains the status bits that are set when a temperature channel  
THERM Limit is exceeded. If any of these bits are set, then the THERM status bit in the Status Register  
is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the  
temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status  
bits will be automatically cleared. The THERM bit in the Status Register will be cleared when all  
individual channel THERM bits are cleared.  
Bit 3 - E3THERM - This bit is set when the External Diode 3 channel exceeds its programmed THERM  
Limit. When set, this bit will assert the THERM pin.  
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed THERM  
Limit. When set, this bit will assert the THERM pin.  
Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed THERM  
limit. When set, this bit will assert the THERM pin.  
Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed THERM limit.  
When set, this bit will assert the THERM pin.  
6.18  
Filter Control Register  
Table 6.23 Filter Configuration Register  
ADDR.  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
40h  
R/W  
Filter Control  
-
-
-
-
-
-
FILTER[1:0]  
00h  
The Filter Configuration Register controls the digital filter on the External Diode 1 channel.  
Revision 2.0 (08-10-12)  
SMSC EMC1403/EMC1404  
DATA4S2HEET