to the Command Chaining section for the
definition of the Status Register during
Address Pointer Registers
Command Chaining operation.
Register defaults to the value 1XX1 0001 upon
either hardware or software reset.
The Status
These read/write registers are each 8-bits wide
and are used for addressing the internal RAM.
The
Writing to Low Register loads the address.
contents of the Address Pointer High and Low
Registers are undefined upon hardware reset.
Diagnostic Status Register
The Diagnostic Status Register contains seven
read-only bits which help the user troubleshoot
the network or node operation. Various
combinations of these bits and the TXEN bit of
the Configuration Register represent different
Warning: To write a valid address to the
Address Pointer Registers, one must first write
to High Register and then to Low Register.
situations.
All of these bits, except the
Configuration Register
Excessive NAcK bit and the New Next ID bit, are
reset to logic "0" upon reading the Diagnostic
Status Register or upon software or hardware
reset. The EXCNAK bit is reset by the "POR
Clear Flags" command, upon a high level on the
TA bit of the Status Register, or upon software
The Configuration Register is
a read/write
register which is used to configure the different
modes of the COM20020-5. The Configuration
Register defaults to the value 0001 1000 upon
hardware reset only.
or hardware reset.
The Diagnostic Status
Register defaults to the value 0000 000X upon
either hardware or software reset.
Setup Register
The Setup Register is a read/write 8-bit register
accessed when the Sub Address Bits are set up
accordingly (see the bit definitions of the
Configuration Register). The Setup Register
allows the user to change the network speed
Command Register
Execution of commands are initiated by
performing microcontroller writes to this register.
Any combinations of written data other than
those listed in Table 5 are not permitted and
may result in incorrect chip and/or network
operation.
(data
rate)
or
the
arbitration
speed
independently, invoke the Receive All feature,
change the nPULSE1 driver type, and reduce
protocol timeouts by a factor of 3.
SLOWARB bit must be set to a 1 for 5 Mbps
The data rate may be slowed down
The
operation.
to 312.5 Kbps and/or the arbitration speed may
be slowed down by a factor of two. The Setup
Register defaults to the value 0000 0000 upon
hardware reset only.
22
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