Low Cost ARCNET (ANSI 878.1) Controller with 2K x 8 On-Board RAM
Chapter 3
PLCC PIN
NO.
1-3
DESCRIPTION OF PIN FUNCTIONS
NAME
SYMBOL
DESCRIPTION
4-6,8-12
27
26
23
24
25
MICROCONTROLLER INTERFACE
Address
A0/nMUX,
Input. On a non-multiplexed mode, A0-A2 are
address input bits. (A0 is the LSB) On a
0-2
A1,A2/ALE
multiplexed address/data bus, nMUX tied Low,
A1 is left open, and ALE is tied to the Address
Latch Enable signal. A1 is connected to an
internal pull-up resistor.
Data 0-7
AD0-AD2, D3- Input/Output. On a non-multiplexed bus, these
D7
signals are used as the data lines for the
device. On a multiplexed address/data bus,
AD0-AD2 act as the address lines (latched by
ALE) and as the low data lines for the device.
D3-D7 are always used for data only. These
signals are connected to internal pull-up
resistors.
nRead/nData nRD/nDS
Input. On a 68XX-like bus, nDS is an active
low signal issued by the microcontroller as the
Strobe
data strobe signal to strobe the data onto the
bus. On a 80XX-like bus, nRD is an active low
signal issued by the microcontroller to indicate
a read operation.
nWrite/
nWR/DIR
Input. On a 68XX-like bus, DIR is issued by
the microcontroller as the Read/nWrite signal
Direction
to determine the direction of data transfer. In
this case, a logic "1" selects a read operation,
while a logic "0" selects a write operation. In
this case, data is actually strobed by the nDS
signal. On an 80XX-like bus, nWR is an active
low signal issued by the microcontroller to
indicate a write operation. In this case, a logic
"0" on this pin, when the COM20019I is
accessed, enables data from the data bus to
be written to the device.
nReset in
nRESET
Input. This active low signal executes a
hardware reset.
nInterrupt
nINTR
Output. This active low signal is generated by
the COM20019I when an enabled interrupt
condition occurs.
nChip Select
nCS
Input. This active low signal selects the
COM20019I for an access.
Rev. 03-07-06
Page 8
SMSC COM20019I
DATASHEET
SMSC [ SMSC CORPORATION ]
