欢迎访问ic37.com |
会员登录 免费注册
发布采购

CAP1128-1-BP-TR 参数 Datasheet PDF下载

CAP1128-1-BP-TR图片预览
型号: CAP1128-1-BP-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [LED Driver]
分类和应用: 驱动接口集成电路
文件页数/大小: 88 页 / 585 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第12页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第13页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第14页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第15页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第17页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第18页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第19页浏览型号CAP1128-1-BP-TR的Datasheet PDF文件第20页  
8 Channel Capacitive Touch Sensor with 2 LED Drivers  
Datasheet  
Table 2.2 Electrical Specifications (continued)  
VDD = 3V to 3.6V, TA = 0°C to 85°C, all Typical values at TA = 27°C unless otherwise noted.  
CHARACTERISTIC  
SYMBOL  
MIN  
TYP  
MAX  
UNIT  
CONDITIONS  
BC-Link Timing  
Clock Period  
Data Hold Time  
Data Setup Time  
Clock Duty Cycle  
tCLK  
tHD:DAT  
tSU:DAT  
Duty  
250  
0
ns  
ns  
ns  
%
30  
40  
Data must be valid before clock  
50  
60  
SPI Timing  
Clock Period  
tP  
250  
ns  
ns  
ns  
Clock Low Period  
Clock High Period  
tLOW  
tHIGH  
tRISE  
0.4 x tP  
0.4 x tP  
0.6 x tP  
0.6 x tP  
Clock Rise / Fall  
time  
/
0.1 x tP  
10  
ns  
tFALL  
Data Output Delay  
Data Setup Time  
Data Hold Time  
tD:CLK  
tSU:DAT  
tHD:DAT  
ns  
ns  
ns  
20  
20  
SPI_CS# to  
SPI_CLK setup time  
tSU:CS  
tWAKE  
0
ns  
us  
Wake Time  
10  
20  
SPI_CS# asserted to CLK assert  
Note 2.5 The ALERT pin will not glitch high or low at power up if connected to VDD or another  
voltage.  
Note 2.6 The SMCLK and SMDATA pins will not glitch low at power up if connected to VDD or  
another voltage.  
Revision 1.32 (01-05-12)  
SMSC CAP1128  
DATA1S6HEET