6 Channel Capacitive Touch Sensor with 2 LED Drivers
Datasheet
3.4.1
SPI Normal Mode
The SPI Bus can operate in two modes of operation, normal and bi-directional mode. In the normal
mode of operation, there are dedicated input and output data lines. The host communicates by sending
a command along the CAP1026 SPI_MOSI data line and reading data on the SPI_MISO data line.
Both communications occur simultaneously which allows for larger through put of data transactions.
All basic transfers consist of two 8 bit transactions from the Master device while the slave device is
simultaneously sending data at the current address pointer value.
Data writes consist of two or more 8-bit transactions. The host sends a specific write command
followed by the data to write the address pointer. Data reads consist of one or more 8-bit transactions.
The host sends the specific read data command and continues clocking for as many data bytes as it
wishes to receive.
3.4.2
SPI Bi-Directional Mode
In the bi-directional mode of operation, the SPI data signals are combined into the SPI_MSIO line,
which is shared for data received by the device and transmitted by the device. The protocol uses a
simple handshake and turn around sequence for data communications based on the number of clocks
transmitted during each phase.
All basic transfers consist of two 8 bit transactions. The first is an 8 bit command phase driven by the
Master device. The second is by an 8 bit data phase driven by the Master for writes, and by the
CAP1026 for read operations.
The auto increment feature of the address pointer allows for successive reads or writes. The address
pointer will return to 00h after reaching FFh.
3.4.3
3.4.4
SPI_CS# Pin
The SPI Bus is a single master, multiple slave serial bus. Each slave has a dedicated CS pin (chip
select) that the master asserts low to identify that the slave is being addressed. There are no formal
addressing options.
Address Pointer
All data writes and reads are accessed from the current address pointer. In both Bi-directional mode
and Full Duplex mode, the Address pointer is automatically incremented following every read
command or every write command.
The address pointer will return to 00h after reaching FFh.
3.4.5
SPI Timeout
The CAP1026 does not detect any timeout conditions on the SPI bus.
3.5
Normal SPI Protocols
When operating in normal mode, the SPI bus internal address pointer is incremented depending upon
which command has been transmitted. Multiple commands may be transmitted sequentually so long
as the SPI_CS# pin is asserted low. Figure 3.1 shows an example of this operation.
Revision 1.1 (08-05-09)
SMSC CAP1026
DATA2S0HEET
SMSC [ SMSC CORPORATION ]
