Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table 27.3 LPC47N350 Configuration Register Map (continued)
HARD
SOFT
INDEX
TYPE
RESET
RESET
CONFIGURATION REGISTER NAME
GLOBAL CONFIGURATION REGISTERS
0x20
0x21
R
0x15
0x00
0x15
0x00
n/a
LPC47N350 Device ID
Device Rev – hard wired
Power Control
R
0x22
R/W
R/W
R/W
R/W
R/W
R/W
-
0x00
0x23
0x00
n/a
Power Mgmt
0x24
0x04
n/a
OSC
0x25
0x04
n/a
Device Mode
0x26
See Note 27.2
Configuration Port Base Address (LSB)
Configuration Port Base Address (MSB)
RESERVED (Test Mode Registers)
0x27
0x28 – 0x2F
0x00
0x00
LOGICAL DEVICE 0 CONFIGURATION REGISTERS (RESERVED)
LOGICAL DEVICE 1 CONFIGURATION REGISTERS (PM1) - OPTIONAL
0x30
R/W
R/W
0x00
0x00
Activate
0x60,
0x61
0x00,
0x00
0x00,
0x00
Primary Base I/O Address
LOGICAL DEVICE 2 CONFIGURATION REGISTERS (RESERVED)
LOGICAL DEVICE 3 CONFIGURATION REGISTERS (RESERVED)
LOGICAL DEVICE 4 CONFIGURATION REGISTERS (SERIAL PORT)
0x30
R/W
R/W
0x00
0x00
Activate
0x60,
0x61
0x00,
0x00
0x00,
0x00
UART Register Base I/O Address
0x70
0xF0
R/W
R/W
0x00
0x00
0x00
n/a
Primary Interrupt Select
Serial Port Mode Register
LOGICAL DEVICE 5 CONFIGURATION REGISTERS (RESERVED)
LOGICAL DEVICE 6 CONFIGURATION REGISTERS (RTC)
0x30
R/W
R/W
0x00
0x00
Activate
0x60,
0x61
0x00,
0x70
0x00,
0x70
RTC Bank 0 Primary Base Address
0x62, 0x63
0x70
R/W
R/W
R/W
R
0x00, 0x74
0x00, 0x74
RTC Bank 1 Primary Base Address
Primary Interrupt Select
0x00
0x00
-
0x00
n/a
-
0xF0
Real Time Clock Mode Register
Shadowed RTC/CMOS Bank 0 Index Register
0xF1
Revision 1.1 (01-14-03)
280
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
