Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
The VCC1 POR does not affect the clock, calendar, or RAM functions. When VCC1 POR is active the
following occurs:
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Periodic Interrupt Enable (PIE) is cleared to “0”.
Alarm Interrupt Enable (AIE) bit is cleared to “0”.
Update Ended Interrupt Enable (UIE) bit is cleared to “0”.
Update Ended Interrupt Flag (UF) bit is cleared to “0”.
Interrupt Request status Flag (IRQF) bit is cleared to “0”.
Periodic Interrupt Flag (PIF) is cleared to “0”.
The RTC and CMOS registers are not accessible.
Alarm Interrupt Flag (AF) is cleared to “0”.
nIRQ pin is in high impedance state.
If both the main power (VCC1) and the battery power (VCC0) are both low at the same time and then
re-applied (for example, a new battery is installed) the following occurs:
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Initialize all registers 00-0D to a “00” when VCC1 is applied.
The oscillator is disabled immediately.
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When PWRGD = 0, all host inputs are locked out so that the internal registers cannot be modified by
the host system. The Host lockout condition continues for 500usec (min) to 1msec (max) after PWRGD
=1. The Host lockout condition does not occur when either of the following occur:
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RTC Divider Selection mode is not in normal mode in Table 23.6.
Revision 1.1 (01-14-03)
268
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
