DESCRIPTION OF PIN FUNCTIONS
PIN
No./QFP
37:40,
42:45
21:31
20
34
55
46
33
32
48
50
52
47
49
51
54
35
36
19
61
62
18,53,
65,93
7,41,
60,76
16
11
10
NAME
TOTAL
SYMBOL
PROCESSOR/HOST INTERFACE (34)
System Data Bus
8
SD[0:7]
11 bit System Address Bus
Chip Select/SA11 (Note 1)
Address Enable
I/O Channel Ready
ISA Reset Drive
Serial IRQ
PCI Clock for Serial IRQ (33 MHz/30 MHz)
DMA Request 1
DMA Request 2
DMA Request 3/8042 P12
DMA Acknowledge 1
DMA Acknowledge 2
DMA Acknowledge 3/8042 P16
Terminal Count
I/O Read
I/O Write
CLOCKS (1)
14.318MHz Clock Input
1
INFRARED INTERFACE (2)
Infrared Rx
1
Infrared Tx
1
POWER PINS (8)
Power
Ground
FDD INTERFACE (16)
Read Disk Data
Write Gate
Write Disk Data
1
1
1
nRDATA
nWGATE
nWDATA
IS
O24/OD24
O24/OD24
CLOCKI
IRRX
IRTX
VCC
VSS
ICLK
I
O24
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SA[0:10]
nCS/SA11
AEN
IOCHRDY
RESET_DRV
SER_IRQ
PCI_CLK
DRQ1
DRQ2
DRQ3/P12
nDACK1
nDACK2
nDACK3/
P16
TC
nIOR
nIOW
BUFFER
TYPE
IO24
I
I
I
OD24
IS
IO24
IO24
O24
O24
O24/IO24
I
I
I/IO24
I
I
I
6
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