SL74HCT02
AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
Symbol
Parameter
25 °C to
-55°C
£85°C
£125°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay, Input A or B to
Output Y (Figures 1 and 2)
16
15
10
20
24
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 2)
19
22
ns
CIN
Maximum Input Capacitance
10
10
pF
Power Dissipation Capacitance (Per Gate)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
25
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/4 of the Device)
System Logic
Semiconductor
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
