SL74HC623
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25 °C to £85°C
-55°C
£125°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay, A to B , B to A
(Figures 1 and 3)
2.0
4.5
6.0
100
20
125
25
150
30
26
17
21
tPLZ, tPHZ Maximum Propagation Delay , Direction or Output
Enable to A or B (Figures 2 and 4)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
ns
ns
tPZL, tPZH Maximum Propagation Delay , Direction or Output
Enable to A or B (Figures 2 and 4)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
4.5
6.0
60
12
10
75
15
13
90
18
15
CIN
Maximum Input Capacitance (Pin 1 or Pin 19)
-
-
10
15
10
15
10
15
pF
pF
COUT
Maximum Three-State I/O Capacitance
(I/O in High-Impedance State)
Power Dissipation Capacitance (Per Transceiver
Channel)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
40
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
System Logic
Semiconductor
SLS