SL74HC323
8-Bit Bidirectional Universal
Shift Register with Parallel I/O
High-Performance Silicon-Gate CMOS
The SL74HC323 is identical in pinout to the LS/ALS323. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
The SL74HC323 features a multiplexed parallel input/output data
port to active full 8-bit handling in a 20 pin package. Due to the large
output drive capability and the 3-state feature, this device is ideally
suited for interface with bus lines in a bus-oriented system.
ORDERING INFORMATION
SL74HC323N Plastic
SL74HC323D SOIC
TA = -55° to 125° C for all packages
Two Mode-Select inputs and two Output Enable inputs are used to
choose the mode of operation as listed in the Function Table.
Synchronous parallel loading is accomplished by taking both Mode-
Select lines, S and S , high. This places the outputs in the high-
1
2
impedance state, which permits data applied to the data port to be
clocked into the register. Reading out of the register can be
accomplished when the outputs are enabled. The active-low synchronous Reset overrides all other inputs.
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Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
PIN ASSIGNMENT
High Noise Immunity Characteristic of CMOS Devices
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND
System Logic
SLS
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
