SL4060B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kW, Input tr=tf=20 ns)
VCC
V
Guaranteed Limit
Symbol
fmax
Parameter
³ -55°C
25°C
£125°C
Unit
Maximum Clock Frequency (50% Duty Cycle)
(Figure 1)
5.0
10
15
3.5
8
12
3.5
8
12
1.75
4
6
MHz
tPHL, tPLH Maximum Propagation Delay, Clock to Q4
(Figure 1)
5.0
10
15
740
300
200
740
300
200
1480
600
400
ns
ns
ns
ns
pF
tPHL, tPLH Maximum Propagation Delay, Qn to Qn+1 (Figure
2)
5.0
10
15
200
100
80
200
100
80
400
200
160
tPHL
Maximum Propagation Delay, Reset to Any Q
(Figure 3)
5.0
10
15
360
160
100
360
160
100
720
320
200
tTHL, tTLH Maximum Output Transition Time, Any Output
(Figure 1)
5.0
10
15
200
100
80
200
100
80
400
200
160
CIN
Maximum Input Capacitance
-
7.5
TIMING REQUIREMENTS(CL=50pF, RL=200 kW, Input tr=tf=20 ns)
VCC
Guaranteed Limit
Symbol
tw
Parameter
V
³ -55°C
25°C
£125°C
Unit
ns
Minimum Pulse Width, Clock (Figure 1)
5.0
10
15
100
40
30
100
40
30
200
80
60
tw
Minimum Pulse Width, Reset (Figure 3)
5.0
10
15
120
60
40
120
60
40
240
120
80
ns
ns
tf, tr
Maximum Input Rise and Fall Times (Figure 1)
5.0
10
15
Unlimited
System Logic
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
