SL4051B
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=20.0 ns)
VCC
V
Guaranteed Limit
Symbol
Parameter
³ -55
°C
£ 25
°C
£ 125
°C
Unit
ns
tPLH, tPHL Maximum Propagation Delay , Analog Input to
Analog Output (Figure 1)
5
10
15
60
30
20
60
30
20
120
60
40
RL=200kW
tPLZ, tPHZ Maximum Propagation Delay , Address to Analog
5
10
720
320
240
720
320
240
1440
640
480
ns
ns
ns
Output (Figure 2) RL=10kW
VEE=GND=0 15
VEE=-5V
Maximum Propagation Delay, Enable to Analog
Output (Figure 2) RL=10kW
5
450
450
900
tPLZ
tPZL
,
5
10
720
320
240
720
320
240
1440
640
480
VEE=GND=0 15
VEE=-10V
5
400
400
800
tPHZ
,
Maximum Propagation Delay, Enable to Analog
5
10
450
210
160
450
210
160
900
420
320
tPZH
Output (Figure 2) RL=10kW
VEE=GND=0 15
VEE=-10V
5
-
300
7.5
300
7.5
600
7.5
CIN
Maximum Input Capacitance, Channel-Select or
pF
pF
Enable Inputs
CI/O
Maximum Capacitance
VEE=GND=-5V
5
-
5
-
CIS
COS
5
5
-
-
30
-
-
Feedthrough CIOS
0.2
System Logic
Semiconductor
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
