SL4012B
Dual 4-Input NAND Gate
High-Voltage Silicon-Gate CMOS
The SL4012B NAND gates provide the system designer with direct
emplementation of the NAND function.
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Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 mA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
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ORDERING INFORMATION
SL4012BN Plastic
SL4012BD SOIC
TA = -55° to 125° C for all packages
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
PIN ASSIGNMENT
NC = NO CONNECTION
FUNCTION TABLE
PINS 6, 8 = NO CONNECTION
PIN 14 =VCC
Inputs
Output
PIN 7 = GND
A
L
B
X
L
C
X
X
L
D
X
X
X
L
Y
H
H
H
H
L
X
X
X
H
X
X
H
X
H
H
X = don’ t care
System Logic
SLS
Semiconductor
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
