SL358
DC ELECTRICAL CHARACTERISTICS(TA=0 to +70°C)
Guaranteed Limit
Symbol
Parameter
Test Conditions
Min
Typ
7.0
10
Max
Unit
mV
V
IO
Maximum Input Offset
Voltage
VO=1.4V VCC=5.0-30V;RS=0W
ICM=0V to VCC-1.7V
9.0
V
DV /DT Input Offset Voltage Drift RS=0W, VCC=30V
mV/ °C
IO
IIO
Maximum Input Offset
Current
VCC=5.0V
150
nA
DIIO/DT Input Offset Current Drift RS=0W, VCC=30V
pA/°C
IIB
Maximum Input Bias
Current
VCC=5.0V
-500
28
nA
V
ICR
Input Common Mode
Voltage Range
VCC=30V
0
V
ICC
Maximum Power Supply
Current
RL=¥ ,VCC=30V,V =0V
3
mA
0
RL=¥ ,VCC=5V,V =0V
1.2
0
AVOL
VOH
Minimum Large Signal
Open-Loop Voltage Gain
VCC=15V, RL³ 2KW
15
V/mV
V
Minimum Output High-
Level Voltage Swing
VCC=30V,RL=2KW
VCC=30V,RL=10KW
26
27
VOL
Maximum Output Low-
Level Voltage Swing
VCC=5V,RL=10KW
20
mV
CMR
PSR
CS
Common Mode Rejection VCC=30V, RS=10KW
65*
65
dB
dB
dB
mA
Power Supply Rejection
Channel Separation
VCC=30V
f=1KHz to 20KHz,VCC=30V
VCC=5.0V
-120*
ISC
Maximum Output Short
Circuit to GND
60*
Isource
Isink
Minimum Source Output
Current
V
V =0V
0
IN+=1V, V =0V, VCC=15V,
10
5
mA
mA
IN-
Minimum Output Sink
Current
VIN+=0V, V =1V, VCC=15V,
IN-
V =15V
0
V
IN+=0V, V =1V, VCC=15V,
IN-
12*
mA
V =0.2V
0
V
IDR
Differential Input Voltage All V ³ GND or V-Supply (if
VCC*
V
IN
Range
used)
*=@25°C
System Logic
Semiconductor
SLS
SLS [ SYSTEM LOGIC SEMICONDUCTOR ]
